library ieee;
use ieee.std_logic_1164.all;
entity low_pass_filter_32 is
  port (clock : in std_logic;
        reset : in std_logic;
        sample : in std_logic_vector(31 downto 0);
        sample_ready : in std_logic;
        output : out std_logic_vector(31 downto 0);
        output_ready : out std_logic);
end;

use ieee.numeric_std.all;
use ieee.fixed_float_types.all;
use ieee.fixed_pkg.all;
architecture behaviour of low_pass_filter_32 is
begin
  LPF16 : entity work.low_pass_filter
    generic map(2,30)
    port map (clock => clock,
              reset => reset,
              sample => to_sfixed(sample, 1, -30),
              sample_ready => sample_ready,
              to_slv(output) => output,
              output_ready => output_ready);
end;